Northeastern University
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Abstract: Scaling of integrated circuits (ICs) enables continuous improvement of the operation frequency on many processor and memory capacity. On the contrary, bus performance and I/O channel speed have not been followed the growth. The link speed is limited by the channel bandwidth due to its low pass filtering characteristics. To extend the channel bandwidth, increase signal integrity and achieve multi-Gb/s date rates, channel equalization is an essential technique in I/O part. One of a common topology is decision-feedback equalizer (DFE), a nonlinear equalizer design applicable at multi-...

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